Subjects : Black-out
| Type | Year | Title | Cited | Download |
|---|---|---|---|---|
| Conference | 2024 | Background VREF calibration circuit design minimizing black-out time for Memory Interfaces Young-Deuk Jeon 대한전자공학회 학술 대회 (하계) 2024, pp.357-358 |
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| Type | Year | Research Project | Primary Investigator | Download |
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