Subjects : clock model
| Type | Year | Title | Cited | Download |
|---|---|---|---|---|
| Conference | 2007 | S/W based IF Signal Simulator Prototyping for L1 C/A, L2C, and E1(B&C) Inone Joo International Conference on Information, Communications and Signal Processing (ICICS) 2007, pp.1-4 | 2 | 원문 |
| Status | Year | Patent Name | Country | Family Pat. | KIPRIS |
|---|---|---|---|---|---|
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| Type | Year | Research Project | Primary Investigator | Download |
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