Inventors

Cho Young Kyun, Kim Jongdae, Kwon Sung-Ku, Roh Tae Moon, Lee Dae Woo

Application No.

11727268 (2007.03.26)

Publication No.

20070190709 (2007.08.16)

Registration No.

7332774 (2008.02.19)

Country

UNITED STATES

Project Code

03MB5300, Development of semiconductor circuit design based on the nano-scaled device, Kim Jongdae

Abstract

Provided is a multiple-gate metal oxide semiconductor (MOS) transistor and a method for manufacturing the same, in which a channel is implemented in a streamline shape, an expansion region is implemented in a gradually increased form, and source and drain regions is implemented in an elevated structure by using a difference of a thermal oxidation rate depending on a crystal orientation of silicon and a geographical shape of the single-crystal silicon pattern. As the channel is formed in a streamline shape, it is possible to prevent the degradation of reliability due to concentration of an electric field and current driving capability by the gate voltage is improved because the upper portion and both sides of the channel are surrounded by the gate electrodes. In addition, a current crowding effect is prevented due to the expansion region increased in size and source and drain series resistance is reduced by elevated source and drain structures, thereby increasing the current driving capability.

KSP Keywords

Crystal silicon, Current crowding effect, Electric Field, Elevated structure, Gate voltage, MOS transistor, Metal-oxide(MOX), Single crystal, Single-crystal silicon, Source and drain, Thermal oxidation, crowding effect, crystal orientation, current crowding, driving capability, gate electrode, metal oxide semiconductor, metal oxide semiconductor (MOS) transistor, oxidation rate, oxide semiconductor, series resistance