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구분 출원국
출원년도 ~ 키워드

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이미지 확대
발명자
김원종, 김승철, 조한진, 이광엽
출원번호
10683228 (2003.10.10)
공개번호
20040107233 (2004.06.03)
등록번호
6917218 (2005.07.12)
출원국
미국
협약과제
초록
The present invention relates to a finite field multiplier used for implementing an encrypting algorithm circuit, thereby minimizing power consumption and circuit area in implementing the finite field multiplier with a LFSR (Linear Feedback Shift Register) structure. The Finite field multiplier of the present invention is an operator performing a modular operation on the multiplication result of two data represented on a polynomial basis in a Galois Field into an irreducible polynomial. The LFSR structure is a serial finite field multiplication structure, and has a merit over an array structure and a hybrid structure in application to systems that are limited in size and power due to its simplicity of circuits and also its capability of being implemented in a small size.
KSP 제안 키워드
Field multiplication, Finite field multiplier, Galois Field(GF), Hybrid structure, Linear feedback, Linear feedback shift register, Polynomial basis, Power Consumption, Shift Register, array structure, feedback shift register, finite field, finite field Multiplication, irreducible polynomial, minimizing power, small size