ETRI-Knowledge Sharing Plaform



특허 검색
구분 출원국
출원년도 ~ 키워드


등록 고전압 및 저전압 소자의 구조와 그 제조 방법

고전압 및 저전압 소자의 구조와 그 제조 방법
이미지 확대
이대우, 유병곤, 양일석, 박일용, 김종대, 노태문
10721970 (2003.11.24)
20040121547 (2004.06.24)
6887772 (2005.05.03)
The present invention relates to structures of a high voltage device and a low voltage device formed on a SOI substrate and a method for manufacturing the same, and it is characterized in which the low voltage device region of silicon device regions in a SOI substrate is higher than the high voltage device region by steps, and a thickness of the silicon device region, where the high voltage device is formed, is equal to a junction depth of impurities of a source and drain in the low voltage device. Accordingly, silicon device regions in the SOI substrate are divided into the high voltage region and the low voltage region and steps are formed there between by oxidation growth method, so that the high voltage device having low junction capacitance can be made, and the low voltage device compatible with the conventional CMOS process and device characteristics can also be made at the same time.
KSP 제안 키워드
By steps, CMOS Process, Device characteristics, Growth method, High Voltage, Junction depth, SOI substrate, Silicon device, Source and drain, high voltage device, junction capacitance, low voltage, low voltage device