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구분 출원국
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등록 초미세 채널을 가지는 MOSFET 소자 및 그 제조 방법

초미세 채널을 가지는 MOSFET 소자 및 그 제조 방법
이미지 확대
조원주, 이성재, 양종헌, 임기주, 오지훈
10749749 (2003.12.30)
20040203198 (2004.10.14)
6995452 (2006.02.07)
Provided are an SOI MOSFET device with a nanoscale channel that has a source/drain region including a shallow extension region and a deep junction region formed by solid-phase diffusion and a method of manufacturing the SOI MOSFET device. In the method of manufacturing the MOSFET device, the shallow extension region and the deep junction region that form the source/drain region are formed at the same time using first and second silicon oxide films doped with different impurities. The effective channel length of the device can be scaled down by adjusting the thickness and etching rate of the second silicon oxide film doped with the second impurity. The source/drain region is formed on the substrate before the formation of a gate electrode, thereby easily controlling impurity distribution in the channel. An impurity activation process of the source/drain region can be omitted, thereby preventing a change in a threshold voltage of the device. A solid-phase impurity is diffused. Therefore, no crystal defect of a substrate is caused, thereby decreasing a junction leakage current.
KSP 제안 키워드
Activation process, Channel Length, Deep Junction, Effective Channel Length, Effective channel, Impurity activation, Impurity distribution, Junction leakage, Leakage current, MOSFET device, Oxide film, Phase diffusion, SOI MOSFET, Silicon oxide, Silicon oxide films, Solid phase, crystal defect, etching rate, gate electrode, junction leakage current, scaled down, solid-phase diffusion, threshold voltage(Vth)
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구분 특허 출원국 KIPRIS
등록 초미세 채널을 가지는 MOSFET 소자 및 그 제조 방법 대한민국 KIPRIS