ETRI-Knowledge Sharing Plaform

ENGLISH

성과물

특허 검색
구분 출원국
출원년도 ~ 키워드

상세정보

등록 실리콘질화막을 이용한 이중 리세스 구조를 갖는 부정형 고 전자 이동도 트랜지스터의 제조방법

실리콘질화막을 이용한 이중 리세스 구조를 갖는 부정형 고 전자 이동도 트랜지스터의 제조방법
이미지 확대
발명자
임종원, 김해천, 안호균, 장우진, 지홍구, 문재경
출원번호
11446750 (2006.06.05)
공개번호
20070134862 (2007.06.14)
등록번호
7419862 (2008.09.02)
출원국
미국
협약과제
초록
Provided is a method of fabricating a pseudomorphic high electron mobility transistor (PHEMT). The method includes the steps of: preparing a substrate including a channel layer and a capping layer that is the uppermost layer; forming a source and a drain on the capping layer; forming a first protective layer on the entire surface of the resultant structure and then patterning the first protective layer to expose a portion of the capping layer in a channel region; removing the exposed portion of the capping layer to form a first recess structure; forming a second protective layer on the entire surface of the resultant structure and then patterning the second protective layer to expose a portion of the substrate in the first recess structure so that a second recess structure is formed; forming a multilayered photoresist layer on the entire surface of the resultant structure and then patterning the multilayered photoresist layer to expose a portion of the substrate through the second recess structure and form a gate-shaped opening; and depositing a metal layer to fill the gate-shaped opening and then removing the multilayered photoresist layer to form a gate connected to the substrate through the second recess structure.
KSP 제안 키워드
Capping layer, Channel layer, High electron, High electron mobility, High electron mobility transistor(HEMT), Protective layer, electron mobility, metal layer, pseudomorphic high electron mobility transistor(pHEMT), recess structure