무승산기 FIR 디지털 필터의 설계 방법
김정범, 어익수, 전인산
- 7933943 (2011.04.26)
- Provided are a multiplierless FIR digital filter and a method of designing the same, in which a filtering operation is performed by a small addition/subtraction circuit using extracted information after analyzing the property of a given coefficient and extracting information required for design by only adding/subtracting operations. In the method of designing the multiplierless FIR digital filter, tables are created to extract and store information needed for adding and subtracting operations. An addition table is created to store values obtained by adding the input data synchronized with a clock frequency. Further, a value corresponding to multiplication is obtained by performing extraction and error correction on the added values from the tables, and an adder chain of an output terminal sums up the values and outputs the filtering results, thereby effectively implementing a logic circuit of the multipliedess FIR digital filter.
- KSP 제안 키워드
- Clock frequency, Digital Filter, Error Correction, FIR digital filter, input data, logic circuit