상세정보
등록 미세 티형 또는 감마형 게이트 전극을 가지는 전계효과 트랜지스터의 제조방법
- 출원번호
- 12122805 (2008.05.19)
- 공개번호
- 20080251858 (2008.10.16)
- 등록번호
- 7902572 (2011.03.08)
- 출원국
- 미국
- 협약과제
- 초록
- A field effect transistor having a T- or �-shaped fine gate electrode of which a head portion is wider than a foot portion, and a method for manufacturing the field effect transistor, are provided. A void is formed between the head portion of the gate electrode and a semiconductor substrate using an insulating layer having a multi-layer structure with different etch rates. Since parasitic capacitance between the gate electrode and the semiconductor substrate is reduced by the void, the head portion of the gate electrode can be made large so that gate resistance can be reduced. In addition, since the height of the gate electrode can be adjusted by adjusting the thickness of the insulating layer, device performance as well as process uniformity and repeatability can be improved
- KSP 제안 키워드
- Etch rates, Field-effect transistors(FETs), Gate resistance, Layer structure, Manufacturing method, Parasitic Capacitance, Sampling Time(Ts), device performance, field effect, gate electrode, insulating layer, multi-layer, multilayer structure, semiconductor substrate
- 패밀리
| 구분 | 특허 | 출원국 | KIPRIS |
|---|---|---|---|
| 등록 | 미세 티형 또는 감마형 게이트 전극을 가지는 전계효과 트랜지스터의 제조방법 | 미국 |