멀티 프로세서 시스템용 다채널 데이터 전송 장치 구조
천익재, 석정희, 김종대, 노태문
- 7970960 (2011.06.28)
- Provided is a direct memory access (DMA) controller. The DMA controller includes a plurality of channel groups and a channel group controller. Each of the channel groups has a plurality of DMA channels, and the channel group controller controls enablement of the DMA channels in units of channel groups. Herein, the channel group controller enables the DMA channels of at least one of the channel groups in data transmission.
- KSP 제안 키워드
- DMA controller, Data transmission, Data transmitting, Memory Access, direct memory access