고전력 고주파 제어회로용 화합물 반도체 소자의 구조 및 제조방법
문재경, 김해천, 안호균, 지홍구, 장우진, 임종원
- 7871874 (2011.01.18)
- Provided are a transistor of a semiconductor device and method of fabricating the same. The transistor includes: an epitaxy substrate disposed on a semi-insulating substrate and having a buffer layer, a first Si planar doping layer, a first conductive layer, a second Si planar doping layer, and a second conductive layer, which are sequentially stacked, the second Si planar doping layer having a doping concentration different from that of the first Si planar doping layer; a source electrode and a drain electrode diffusing into the first Si planar doping layer to a predetermined depth and disposed on both sides of the second conductive layer to form an ohmic contact; and a gate electrode disposed on the second conductive layer between the source and drain electrodes and being in contact with the second conductive layer. In this structure, both isolation and switching speed of the transistor can be increased. Also, the maximum voltage limit applied to the transistor is increased due to increases in gate turn-on voltage and threshold voltage and a reduction in parallel conduction element. As a result, the power handling capability of the transistor can be improved, thus improving a high-power low-distortion characteristic and an isolation characteristic.
- KSP 제안 키워드
- Buffer layer, Compound semiconductor device, Conductive layer, Control Circuit, Doping concentration, Drain electrode, Fabrication method, Frequency control, High power, Ohmic contact, Power handling, Power handling capability, Radio Frequency(RF), Radio frequency control, Semi-Insulating, Source and drain, Switching speed, Turn-on, Turn-on voltage, Voltage Limit, compound semiconductor, gate electrode, insulating substrate, low-distortion, maximum voltage, semiconductor device, threshold voltage(Vth)