상변화메모리 소자를 이용한 FPGA 프로그래머블 논리블럭 구현방법
유병곤, 윤성민, 김용주, 이승윤, 박영삼, 정순원
- 7911227 (2011.03.22)
- Provided is a programmable logic block of a field-programmable gate array (FPGA). The programmable logic block includes a pull-up access transistor connected to a power source, an up-phase-change memory device connected to the pull-up access transistor, a down-phase-change memory device connected to the up-phase-change memory device, an output terminal between the up-phase-change memory device and the down-phase-change memory device, and a pull-down access transistor connected to the down-phase-change memory device and a ground. The resistance values of the up-phase-change memory device and the down-phase-change memory device are individually programmed.
- KSP 제안 키워드
- Access transistor, Field Programmable Gate Arrays(FPGA), Gate array, Phase Change Material(PCM), Phase change, Programmable Logic, Pull-down, Pull-up, field-programmable, memory device, power source, programmable gate