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성과물

특허 검색
구분 출원국
출원년도 ~ 키워드

상세정보

등록 계수 평균화 기법을 적용한 계수 곱셈기 및 이를 이용한 디지털 델타-시그마 변조기

계수 평균화 기법을 적용한 계수 곱셈기 및 이를 이용한 디지털 델타-시그마 변조기
이미지 확대
발명자
조민형, 권종기, 김이경
출원번호
12783294 (2010.05.19)
공개번호
20110140940 (2011.06.16)
등록번호
8164491 (2012.04.24)
출원국
미국
협약과제
초록
Provided are a coefficient multiplier and digital delta-sigma modulator using the same. The coefficient multiplier has the average of output signals of respective dependent multipliers as an effective coefficient using a coefficient averaging technique without employing an adder that has a complex structure and occupies a large chip area. Accordingly, the coefficient multiplier has a simple hardware constitution and small chip area in comparison with a canonical signed digit (CSD) coefficient multiplier, and the digital delta-sigma modulator employing the coefficient multiplier has a simple structure and small size.
KSP 제안 키워드
Averaging technique, Canonical Signed Digit(CSD), Chip area, Complex structure, Delta-Sigma Modulator, Large chip, Signed Digit, delta-sigma, effective coefficients, simple structure, small size