ETRI-Knowledge Sharing Plaform

ENGLISH

성과물

특허 검색
구분 출원국
출원년도 ~ 키워드

상세정보

등록 DC 오프셋 제거 회로

DC 오프셋 제거 회로
이미지 확대
발명자
유현규, 박정우, 이영재, 김성도, 민병훈, 이상국, 이상성
출원번호
12950193 (2010.11.19)
공개번호
20110121880 (2011.05.26)
등록번호
8222944 (2012.07.17)
출원국
미국
협약과제
초록
A DC offset cancellation circuit includes: a control signal generation unit generating i (i is a natural number) number of pulse signals having a pulse width corresponding to a DC offset amount; a current source supplying i number of currents each having a different current ratio; a switching unit determining a current quantity to be supplied to a feedback capacitor by adjusting a turn-on quantity of each of the i number of currents according to the pulse width of each of the i number of pulse signals; and an electric charge quantity regulation unit charging DC offset electric charges corresponding to current supplied from the switching unit through the feedback capacitor and transferring the DC offset electric charges charged in the feedback capacitor to a sampling capacitor through a rotary capacitor, to allow the sampling capacitor to primarily store the DC offset electric charges and then secondarily store electric charges corresponding to an input signal.
KSP 제안 키워드
Charge quantity, Control Signal, Current ratio, Current source, DC-offset, Dc offset cancellation(DOC), Electric charge, Electric charge quantity, Generation unit, Input signal, Number of pulse, Signal generation, Turn-on, control signal generation, offset cancellation, pulse signal, pulse width