N형 박막 트랜지스터로 구성되는 저소비전력 논리회로
임도, 황치선, 윤성민, 오힘찬, 박상희, 유병곤, 박기찬, 김지선, 피재은, 오민우, 김병훈, 임홍균
- 9099991 (2015.08.04)
- Disclosed are an inverter, a NAND gate, and a NOR gate. The inverter includes: a pull-up unit constituted by a second thin film transistor outputting a first power voltage to an output terminal according to a voltage applied to a gate; a pull-down unit constituted by a fifth thin film transistor outputting a ground voltage to the output terminal according to an input signal applied to a gate; and a pull-up driver applying a second power voltage or the ground voltage to the gate of the second thin film transistor according to the input signal.
- KSP 제안 키워드
- Input signal, NAND gate, NOR Gate, Pull-down, Pull-up, Thin-Film Transistor(TFT), an inverter, thin film(TF)