상세정보
등록 파이프라인 폴딩 구조의 아날로그-디지털 변환기
- 출원번호
- 10872530 (2004.06.22)
- 공개번호
- 20050140535 (2005.06.30)
- 등록번호
- 6950051 (2005.09.27)
- 출원국
- 미국
- 협약과제
- 03MB3700, 차세대 통합 휴대 단말 기술, 조경익
- 초록
- Provided is a pipelined folding analog-digital converter, the pipelined folding analog-digital converter comprising: a first sample-and-hold unit that samples and outputs a number of analog input voltages; a reference voltage generator that generates a number of reference voltages; a pre-amplifier that amplifies and outputs a number of values subtracting each reference voltage from the outputs of the first sample-and-hold unit, wherein an offset effect due to asymmetry of the amplifier is eliminated; a first folder that folds and outputs a number of outputs of the pre-amplifier; a second sample-and-hold unit that samples and outputs a number of outputs of the first folder; a second folder that folds and outputs a number of outputs of the second sample-and-hold unit; and a comparator that performs a comparison operation between the outputs of the pre-amplifier and the output values of the second folder to find a digital output value, whereby the offset caused by the device mismatch is removed, so that it is possible to realize a high-resolution analog-digital converter.
- KSP 제안 키워드
- Analog input, Digital output, High-resolution, Pre-amplifier, analog-digital converter, device mismatch, digital converter, reference voltage, sample-and-hold, voltage generator