등록
다단 연속 근사 레지스터 아날로그 디지털 변환기 및 이를 이용한 아날로그 디지털 변환 방법
- 발명자
-
전영득, 조영균, 권종기, 남재원
- 출원번호
-
12433764 (2009.04.30)
- 공개번호
-
20100066583 (2010.03.18)
- 등록번호
- 7999719 (2011.08.16)
- 출원국
- 미국
- 협약과제
-
08MB2800, 45nm급 혼성 SoC용 아날로그 회로기술,
권종기
- 초록
- A multi-stage Successive Approximation Register Analog-to-Digital Converter (SAR ADC) and an analog-to-digital converting method using the same are provided. The multi-stage SAR ADC connects small-size and low-power SAR ADCs in multiple stages, thereby reducing a whole chip size and power consumption. The analog-to-digital converting method simultaneously performs analog-to-digital conversions in the SAR ADCs connected in the multiple stages, thereby reducing an analog-to-digital conversion time and maintaining an operating rate of several tens of MHz to several hundreds of MHz similar to that of a pipeline ADC.
- KSP 제안 키워드
- Analog to digital converter(ADC), Analog-to-Digital Conversion, Converting method, Low-Power, Multi-stage, Pipeline ADC, Power Consumption, Successive Approximation(SA), analog-to-digital, conversion time, digital converter, small size, successive approximation analog-to-digital converter(SAR ADC), successive approximation register, successive approximation register analog-to-digital converter