등록
순차 접근 아날로그-디지털 변환기 및 그 구동 방법
- 발명자
-
조영균, 남재원, 권종기, 전영득
- 출원번호
-
12882421 (2010.09.15)
- 공개번호
-
20110227774 (2011.09.22)
- 등록번호
- 8164504 (2012.04.24)
- 출원국
- 미국
- 협약과제
-
09MB2100, 45nm급 혼성 SoC용 아날로그 회로기술,
권종기
- 초록
- A successive approximation resistor analog digital converter (SAR ADC) includes a first conversion unit including a correction capacitor array and a bit capacitor array 2V-1 less than the number of a bit, a second conversion unit configured to differentially operate with the first conversion unit, a comparator configured to output a voltage of a high level or a low level of each capacitor according to output voltages of the first and second conversion units, a successive approximation register (SAR) logic unit configured to receive an output voltage of the comparator to convert the received output voltage into a digital signal, and a correction logic unit configured to receive the digital signal converted by the SAR logic unit and to correct a digital signal of the bit capacitor array using a correction digital signal of the correction capacitor array of the received digital signal.
- KSP 제안 키워드
- Capacitor array, Digital Signal, Output Voltage, Successive Approximation(SA), analog-digital converter, digital converter, low level, successive approximation analog-to-digital converter(SAR ADC), successive approximation register