ETRI-Knowledge Sharing Plaform

Schottky Barriers(SBs) N-Type Metal Gate Silicon On Insulator(SOI) Gate Length Schottky Diode Erbium Silicide SOI MOSFET Single Electron Transistor(SET) Ultra-Thin Body(UTB) Flat-Band Voltage Current Drivability Pt-Er Alloy Interface Trap States Side Gates Hybrid Integrated Circuits Quantum Simulation Interface Trap Density High Current Drain Current Applied Physics Metal-Oxide-Semiconductor Field-Effect Transistor(MOSFET) Gate-Controlled Tunnel Transistors Equivalent Oxide Thickness Amplification Ratio Annealing Effects Current Oscillations Dry Etching Electrical And Structural Properties Flowing Property Gate Electrode Low Leakage Current Pattern-Dependent Oxidation Quantum Dot(QD) Quantum Limit Resonant Peak Silicon Nanowires(SiNWs) Si Nanowires Barrier Metal Carrier Injection Ni Implantation Negative Gate Voltage Output Window Peak-To-Valley Rc Delay Tri-Gate 5 Nm Activation Annealing Complementary Logic Coupled With Electrode Contact Extraction Method Ettective Metal Work Function Fabrication Process High Voltage Gain Hio 2 Interface Dipole Interface States Numerical Simulations Negative Shift Rc Time Constant Room-Temperature Subthreshold Slope(SS) Subthreshold Characteristics Subthreshold Swing(SS) Sub-10 Nm Voltage Transfer Universal Property External Resistance Hydrogen Silsesquioxane Input And Output Interface Quality Injection Characteristics Punch-Through Low Damage Negative Charge On/Off Current Ratio Self-Aligned Silicon-Based Schottky Barrier Height Selective Biofunctionalization Time-Reversal Symmetry Tunneling Current Ac Admittance Buried Oxide Charging Dynamics Data Analysis E-Beam Lithography Elevated Temperature High Temperature In-Plane Structure Interfacial Layer Long Channel Low Sheet Resistance Negative Differential Resistance Behavior Oxide-Semiconductor Field-Effect Transistors Plasma Doping Schottky Contacts Thermionic Current Anomalous Transmission Capacitance-Voltage Drain-Induced Barrier Lowering(DIBL) Gate Oxide Thickness N-Mosfet Platinum Silicide Reverse Bias Resonant Tunneling Effect Short-Channel Effects Wide-Range Output Current On-Off Ratio Doping Technique Heavily Doped Hard Mask High Pressure Hydrogen Annealing Laser Annealing Nanoscale Regime Novel Device Power Amplification Plasma Etching Process P-Type Small Set Triple-Gate Valley Current Channel Length Current-Voltage Characteristics Doping Method Drain Voltage Dual Gate(DG) Diffusive Scattering Doubly Clamped Electron Mean Free Path Equivalent Circuit Modeling Erbium Suicide High-K Dielectric Inorganic Resist Logic Cell Output Voltage Polycrystalline Silicon(poly-Si) Phase Evolution Schottky Barrier Tunneling Schottky Barrier Diode(SBD) Si Substrate Undoped Channel Transmission Phase Simulation Results