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학술지 A Memory-Efficient Pattern Matching with Hardware-Based Bit-Split String Matchers for Deep Packet Inspection
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저자
김현진, 김홍식, 이정희, 안진호, 강성호
발행일
201002
출처
IEICE Transactions on Communications, v.E93.B no.2, pp.396-398
ISSN
0916-8516
출판사
일본, 전자정보통신학회 (IEICE)
DOI
https://dx.doi.org/10.1587/transcom.E93.B.396
협약과제
09MR8400, Scalable 마이크로 플로우 처리기술개발, 이범철
초록
This paper proposes a hardware-based parallel pattern matching engine using a memory-based bit-split string matcher architecture. The proposed bit-split string matcher separates the transition table from the state table, so that state transitions towards the initial state are not stored. Therefore total memory requirements can be minimized. © 2010 The Institute of Electronics.
키워드
Computer network security, Deep packet inspection, Finite state machine, Pattern matching and network monitoring
KSP 제안 키워드
Bit-split, Computer network security, Memory-based, Parallel pattern matching, Pattern matching engine, State Transition, Transition Table, deep packet inspection(DPI), finite state machine, initial state, memory requirements