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학술지 Efficient Implementation of a Pseudorandom Sequence Generator for High-Speed Data Communications
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저자
황수연, 박기윤, 김대호, 장경선
발행일
201004
출처
ETRI Journal, v.32 no.2, pp.222-229
ISSN
1225-6463
출판사
한국전자통신연구원 (ETRI)
DOI
https://dx.doi.org/10.4218/etrij.10.1409.0047
협약과제
09MR1700, 4세대 이동통신을 위한 적응 무선접속 및 전송 기술개발, 김영진
초록
A conventional pseudorandom sequence generator creates only 1 bit of data per clock cycle. Therefore, it may cause a delay in data communications. In this paper, we propose an efficient implementation method for a pseudorandom sequence generator with parallel outputs. By virtue of the simple matrix multiplications, we derive a well-organized recursive formula and realize a pseudorandom sequence generator with multiple outputs. Experimental results show that, although the total area of the proposed scheme is 3% to 13% larger than that of the existing scheme, our parallel architecture improves the throughput by 2, 4, and 6 times compared with the existing scheme based on a single output. In addition, we apply our approach to a 2×2 multiple input/multiple output (MIMO) detector targeting the 3rd Generation Partnership Project Long Term Evolution (3GPP LTE) system. Therefore, the throughput of the MIMO detector is significantly enhanced by parallel processing of data communications. Copyright © 2010 ETRI.
키워드
3GPP LTE system, Linear feedback shift register, Matrix multiplication, MIMO detector, Pseudorandom sequence generator
KSP 제안 키워드
3GPP LTE, 3rd generation partnership project(3GPP), Clock Cycle, High Speed, Implementation method, LTE systems, Linear feedback shift register, Long term Evolution(LTE), Multiple Output (MIMO) detector, Parallel Architecture, Parallel Processing