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학술지 On-Chip Bus Serialization Method for Low-Power Communications
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저자
이재성
발행일
201008
출처
ETRI Journal, v.32 no.4, pp.540-547
ISSN
1225-6463
출판사
한국전자통신연구원 (ETRI)
DOI
https://dx.doi.org/10.4218/etrij.10.0109.0447
협약과제
09MS2400, 저비용 대규모 글로벌 인터넷 서비스 솔루션 개발, 남궁한
초록
One of the critical issues in on-chip serial communications is increased power consumption. In general, serial communications tend to dissipate more energy than parallel communications due to bit multiplexing. This paper proposes a low-power bus serialization method. This encodes bus signals prior to serialization so that they are converted into signals that do not greatly increase in transition frequency when serialized. It significantly reduces the frequency by making the best use of word-to-word and bit-by-bit correlations presented in original parallel signals. The method is applied to the revision of an MPEG-4 processor, and the simulation results show that the proposed method surpasses the existing one. In addition, it is cost-effective when implemented as a hardware circuit since its algorithm is very simple. © 2010 ETRI.
키워드
Bus serialization, Low-power design, Multimedia, On-chip bus, System-on-chip
KSP 제안 키워드
Critical issues, Hardware Circuit, Low-Power design, Low-power bus, Mpeg-4, On-Chip Bus, Power Consumption, Serial Communication, System-On-Chip(SoC), cost-effective, increased power