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학술지 Single-Chip Photonic Transceiver Based on Bulk-Silicon, as a Chip-Level Photonic I/O Platform for Optical Interconnects
Cited 30 time in scopus Download 11 time Share share facebook twitter linkedin kakaostory
저자
김경옥, 박현대, 주지호, 장기석, 곽명준, 김상훈, 김인규, 오진혁, 김선애, 박재규, 김상기
발행일
201506
출처
Scientific Reports, v.5, pp.1-11
ISSN
2045-2322
출판사
Nature Publishing Group
DOI
https://dx.doi.org/10.1038/srep11329
협약과제
14MB1300, 실리콘 나노포토닉스 기반 차세대 컴퓨터 인터페이스 플랫폼 원천기술 개발, 김경옥
초록
When silicon photonic integrated circuits (PICs), defined for transmitting and receiving optical data, are successfully monolithic-integrated into major silicon electronic chips as chip-level optical I/Os (inputs/outputs), it will bring innovative changes in data computing and communications. Here, we propose new photonic integration scheme, a single-chip optical transceiver based on a monolithic-integrated vertical photonic I/O device set including light source on bulk-silicon. This scheme can solve the major issues which impede practical implementation of silicon-based chip-level optical interconnects. We demonstrated a prototype of a single-chip photonic transceiver with monolithic-integrated vertical-illumination type Ge-on-Si photodetectors and VCSELs-on-Si on the same bulk-silicon substrate operating up to 50Gb/s and 20Gb/s, respectively. The prototype realized 20Gb/s low-power chip-level optical interconnects for {\\lambda} ~850nm between fabricated chips. This approach can have a significant impact on practical electronic-photonic integration in high performance computers (HPC), cpu-memory interface, hybrid memory cube, and LAN, SAN, data center and network applications.
KSP 제안 키워드
Data center, Ge-on-Si, High-performance computer(HPC), Hybrid Memory Cube, I/O devices, Illumination type, Integration scheme, Light sources, Low-Power, Memory interface, Network applications