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학술지 Power Trench Gate MOSFET with an Integrated 6-Pack Configuration for a 3-Phase Inverter
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저자
원종일, 구진근, 조두형, 박건식, 양일석, 김상기
발행일
201510
출처
한국물리학회, v.67 no.7, pp.1214-1221
ISSN
0374-4884
출판사
한국물리학회
DOI
https://dx.doi.org/10.3938/jkps.67.1214
협약과제
15ZB1600, SiC 기반 트렌치형 차세대 전력소자 핵심기술 개발, 김상기
초록
In this paper, we present a new 6-pack power module for a 3-phase inverter that is integrated with the six trench gate double diffused metal-oxide semiconductor field-effect transistor (TDMOS) on a single chip. An integration of each power device is performed through a trench isolation technique using deep reactive-ion etching trench technologies. Through this new technology, the integrated power metal-oxide semiconductor field-effect transistor (MOSFET) produces a high current of above 30 A at a gate bias of 10 V. In addition, each trench power MOSFET (1-pack) has a minimum specific on-resistance of 21 mohm.cm2 and a typical breakdown voltage of 95 V. The trench isolation provides good isolation up to 120 V. The measurement results show that this 6-pack structure can successfully be integrated with other analog/driver integrated circuit on a single chip. Furthermore, to monitor the operating current of the MOSFET under an inverter-operating condition, sensing FET is integrated a FET into the main MOSFET source region without compromising either the area or the operation of the MOSFET.
키워드
6-pack, Inverter, Isolation, Single chip, TDMOS
KSP 제안 키워드
3-phase inverter, Breakdown voltage(BDV), Field-effect transistors(FETs), High current, Integrated circuit, Isolation technique, Metal-oxide(MOX), Metal-oxide-semiconductor field-effect transistor(MOSFET), Operating conditions, Power device, Reactive ion etching(RIE)