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학술지 A 28.5-3-GHz Fast Settling Multichannel PLL Synthesizer for 60-GHz WPAN Radio
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저자
이자열, 이상흥, 김해천, 유현규
발행일
200805
출처
IEEE Transactions on Microwave Theory and Techniques, v.56 no.5, pp.1234-1246
ISSN
0018-9480
출판사
IEEE
DOI
https://dx.doi.org/10.1109/TMTT.2008.920179
협약과제
07MB1100, 60GHz Pico cell 통신용 SoP, 유현규
초록
A 28.532-GHz fast settling multichannel frequency synthesizer is implemented in 0.25-μm SiGe:C BiCMOS process technology for 60-GHz wireless personal area network (WPAN) applications. The phase-locked loop (PLL) synthesizes carrier frequencies between 28.532 GHz in step of 500 MHz, and settles in approximately 327 ns. The proposed PLL can be employed as a frequency source providing eight channels of frequency hopping carriers for 60-GHz WPAN radio. To generate eight channels of carriers, an integer-N PLL with 125-MHz reference frequency is implemented, and a programmable divider with all differential current-steering circuits is designed. The programmable divider reliably provides divide ratios of 114128 at 15 GHz. To achieve eight channels of carriers at a challenging frequency of 30 GHz, a pushpush voltage-controlled oscillator is employed using a Wilkinson power combiner. The PLL consumes 115 mA at 2.5 V and achieves phase noise of -81 dBc/Hz at 1-MHz offset measured from 32-GHz pushpush carrier. © 2006 IEEE.
키워드
60 GHz, Frequency synthesizer, Phase noise, Phase-locked loop (PLL), Push-push voltage-controlled oscillator (VCO), Wireless personal area network (WPAN)
KSP 제안 키워드
15 GHz, 30 GHz, 60 GHz, BiCMOS process, Current-steering, Differential current, Fast Settling, Frequency source, Frequency synthesizer, PLL synthesizer, Phase locked loop(PLL)