ETRI-Knowledge Sharing Plaform

ENGLISH

성과물

논문 검색
구분 SCI
연도 ~ 키워드

상세정보

학술지 Circuit Emulations
Cited 6 time in scopus Download 1 time Share share facebook twitter linkedin kakaostory
저자
C. K. Kim, 이상훈, L. T. Wu
발행일
198810
출처
International Journal of Digital and Analog Cabled Systems, v.1 no.4, pp.245-256
ISSN
1074-5351
DOI
https://dx.doi.org/10.1002/dac.4520010411
초록
The deployment of broadband public packet networks requires integrating packet technology into the larger, predominantly circuit?릗witched world. In this paper, we translate the need for circuit?릗witched network compatibility into a class of packet transport capabilities referred to as circuit emulations. We first present our initial estimates of performance goals for emulating circuit?릗witched connections in a broadband packet network. To show the feasibility of this new networking approach, we then describe a switch design capable of satisfying the stringent packet loss rate and delay requirements for emulating circuits at the DS1 rate and above. Finally, we demonstrate the ability to reconstruct continuous signals from emulated circuits using a simple time?륾veraging clock recovery scheme based on a computer simulation model. Copyright © 1988 John Wiley & Sons, Ltd.
키워드
Broadband ISDN, Hybrid switching, Integrated networks
KSP 제안 키워드
Clock recovery(CR), Computer simulation(MC and MD), Computer simulation model, Hybrid switching, Packet network, Packet transport, Switch Design, integrated network, need for, packet loss rate, recovery scheme