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학술지 Epitaxial Junction Termination Extension (Epi-JTE) for SiC Power Devices
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저자
조두형, 박건식, 원종일, 김상기, 김광수
발행일
201705
출처
IEICE Transactions on Electronics, v.E100.C no.5, pp.439-445
ISSN
1745-1353
출판사
일본, 전자정보통신학회 (IEICE)
DOI
https://dx.doi.org/10.1587/transele.E100.C.439
협약과제
17ZB1400, SiC 기반 트렌치형 차세대 전력소자 핵심기술 개발, 김상기
초록
In this paper, Epitaxial (Epi) Junction Termination Extension (JTE) technique for silicon carbide (SiC) power device is presented. Unlike conventional JTE, the Epi-JTE doesn't require high temperature (about 500°C) implantation process. Thus, it doesn't require high temperature (about 1700°C) process for implanted dose activation and surface defect curing. Therefore, the manufacturing cost will be decreased. Also, the fabrication process is very simple because the dose of the JTE is controlled by epitaxy growth. The blocking characteristic is analyzed through 2Dsimulation for the proposed Epi-JTE. In addition, the effect was validated by experiment of fabricated SiC device with the Single-Zone-Epi-JTE. As a result, it has blocking capability of 79.4% compared to ideal parallel-plane junction breakdown.
키워드
Edge termination, Junction termination extension (JTE), Power device, Silicon carbide (SiC)
KSP 제안 키워드
Blocking capability, Edge termination, Epitaxy growth, High Temperature, Junction termination extension(JTE), SiC device, SiC power devices, Surface defects, fabrication process, manufacturing cost, silicon carbide(3C-SiC)