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학술지 TEI-power: Temperature Effect Inversion-Aware Dynamic Thermal Management
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저자
이우주, 한규승, Yanzhi Wang, Tiansong Cui, Shahin Nazarian, Massoud Pedram
발행일
201704
출처
ACM Transactions on Design Automation of Electronic Systems, v.22 no.3, pp.1-25
ISSN
1084-4309
출판사
ACM
DOI
https://dx.doi.org/10.1145/3019941
협약과제
16ZS1200, 초저에너지 프로세서를 위한 NZV 마이크로그레인 아키텍처 기술, 이재진
초록
FinFETs have emerged as a promising replacement for planar CMOS devices in sub-20nm technology nodes. However, based on the temperature effect inversion (TEI) phenomenon observed in FinFET devices, the delay characteristics of FinFET circuits in sub-, near-, and superthreshold voltage regimes may be fundamentally different from those of CMOS circuits with nominal voltage operation. For example, FinFET circuits may run faster in higher temperatures. Therefore, the existing CMOS-based and TEI-unaware dynamic power and thermal management techniques would not be applicable. In this article, we present TEI-power, a dynamic voltage and frequency scaling-based dynamic thermal management technique that considers the TEI phenomenon and also the superlinear dependencies of power consumption components on the temperature and outlines a real-Time trade-off between delay and power consumption as a function of the chip temperature to provide significant energy savings, with no performance penalty-namely, up to 42% energy savings for small circuits where the logic cell delay is dominant and up to 36% energy savings for larger circuits where the interconnect delay is considerable.
KSP 제안 키워드
CMOS circuits, CMOS devices, Chip temperature, Delay characteristics, Dynamic Thermal Management, Dynamic power, Dynamic voltage and frequency scaling, Energy saving, FinFET devices, Higher temperatures, Logic Cell