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학술지 TEI-NoC: Optimizing Ultra-Low Power NoCs Exploiting the Temperature Effect Inversion
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저자
한규승, 이우주, 이재진, 이진호, 페드람
발행일
201802
출처
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, v.37 no.2, pp.458-471
ISSN
0278-0070
출판사
IEEE
DOI
https://dx.doi.org/10.1109/TCAD.2017.2693269
협약과제
17HB1200, 스마트 디바이스용 지능형 반도체 공통 플랫폼 기술 개발, 이재진
초록
The era of the Internet of Things (IoT) is upon us. In this era, minimizing power consumption becomes a primary concern of system-on-chip designers. Ultralow power (ULP) very large-scale integration circuits have been receiving considerable interest from both academia and industry as the best-suited techniques for IoT devices, which can take full advantage of power-saving that voltage scaling potentially achieves. Consequently, research on ULP designs has begun to yield tangible outcomes, namely ULP circuits. However, little attention has been paid to ULP network-on-chip (NoC), although the NoC is an essential of the ULP chips, and its power consumption accounts for a significant portion of the total power. This paper focuses on ULP NoCs, and presents a new power management method that exploits delay versus temperature characteristics of ULP circuits. Recent studies on ULP circuits show that delay versus temperature characteristics are fundamentally different from normal circuits, i.e., the delay of the ULP circuits implemented in state-of-the-art bulk CMOS operating at low supply voltages or in FinFET technologies decreases with increasing temperature, a phenomenon known as the temperature effect inversion (TEI). Starting with an intuition that at a certain temperature point, power savings without performance penalty can be achieved by increasing the router frequency to create the opportunity to turn off some routers in ULP NoCs, or by decreasing the NoC supply voltage level, an optimization method is presented to maximize the power savings with minor performance penalty. To validate the proposed method, a concrete ULP NoC simulator, TEI-Noxim, has been developed. Experimental results demonstrate that TEI-aware NoC achieves an average of 36.0% power reduction over 21 applications.
키워드
Network-on-chip (NoC), System-on-chip (SoC), Temperature effect inversion (TEI), Ultralow power (ULP) design
KSP 제안 키워드
Bulk CMOS, Increasing temperature, Internet of thing(IoT), IoT Devices, Network on Chip(NoC), NoC Simulator, Power Consumption, Supply voltage, System-On-Chip(SoC), Temperature effect inversion(TEI), Ultralow power(ULP)