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학술대회 Power Estimation of Cryptographic Modules using Virtual SoC Platform
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저자
윤성재, 박기혁, 김원종, 조한진
발행일
201801
출처
International Conference on Electronics, Information and Communication (ICEIC) 2018, pp.1098-1100
DOI
https://dx.doi.org/10.23919/ELINFOCOM.2018.8330655
협약과제
17ZT1100, 판교 테크노밸리 연계 개방형 SW-SoC 융합 플랫폼 개발, 임덕래
초록
The power consumption in cryptographic modules depends on hardware and software. The virtual SoC platform is a good candidate for co-designing them together and to estimate performance and power consumption. We proposed the method to estimate power consumption of the cryptographic modules using virtual SoC platform. The power consumption of cryptographic modules depends on the status of each cryptographic module. To minimize the increase in simulation time, we only consider the changes of state registers. The experimental results show that the power estimation of cryptographic modules can be estimated with reasonable error bounding using the proposed method.
키워드
Cryptographic module, Power estimation, virtual SoC platform
KSP 제안 키워드
Co-designing, Cryptographic module, Error bounding, Power Consumption, hardware and software, power estimation, simulation time