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학술대회 Design of Analog and Digital Hybrid MAC Circuit for Artificial Neural Networks
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저자
박기혁, 조민형, 전영득, 이주현
발행일
201901
출처
International Conference on Electronics, Information and Communication (ICEIC) 2019, pp.621-623
DOI
https://dx.doi.org/10.23919/ELINFOCOM.2019.8706340
협약과제
18HB2200, 신경모사 인지형 모바일 컴퓨팅 지능형반도체 기술개발, 이주현
초록
Demand for high-performance hardware acceleration for machine learning applications is increasing rapidly. This paper presents a low power analog and digital hybrid MAC (Multiply and Accumulation) circuit for artificial neural networks. The proposed MAC circuit consists of an analog synapse unit, digital preprocessing and postprocessing unit for support of the parallel analog synapse cores. As the hybrid MAC circuit supports relatively low power and fast multiple MAC operations, it provides a good advantage in developing hardware accelerator for artificial neural networks.
키워드
Analog, Digital, Hybrid, MAC, Neural network
KSP 제안 키워드
Artificial neural networks, Hardware accelerator, High performance, Hybrid MAC, hardware acceleration, low power analog, machine learning applications