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학술지 MMNoC: Embedding Memory Management Units into Network-on-Chip for Lightweight Embedded Systems
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저자
장형욱, 한규승, 이석호, 이재진, 이우주
발행일
201906
출처
IEEE Access, v.7, pp.80011-80019
ISSN
2169-3536
출판사
IEEE
DOI
https://dx.doi.org/10.1109/ACCESS.2019.2923219
협약과제
19HB1600, 경량 RISC-V 기반 초저전력 인텔리전트 엣지 지능형반도체 기술 개발, 이재진
초록
With the advent of the Internet-of-Things (IoT) era, the demand for lightweight embedded systems is rapidly increasing. So far, ultra-low power (ULP) processors have been leading the development of lightweight embedded systems. However, as the IoT era gets more sophisticated, existing ULP processors are expected to reach a critical limit in the absence of a memory management unit (MMU) in that multiple programs cannot be run in the MMU-less embedded systems. To tackle this issue, we propose an architecture in which the MMU is embedded in a network-on-chip (NoC). Through the proposed approach, NoC offers MMU functionality without modifying the processor design, allowing developers to easily leverage the existing ULP lightweight processors and build embedded systems that support multiprocessing. In this paper, along with the details of the proposed MMU-embedded NoC (MMNoC) design, a prototype platform including the MMNoC and dual RISC-V processors is provided. The prototype platform is synthesized with FPGA and Samsung 28nm FD-SOI technology to verify the functional accuracy and small performance, area, and power overhead of the MMNoC.
키워드
embedded system, memory management unit, MMU, Network-on-chip, NoC
KSP 제안 키워드
28nm FD-SOI, Internet of thing(IoT), MMU-less embedded systems, Memory management Unit, Network on Chip(NoC), RISC-V, SOI technology, Ultralow power(ULP), processor design