ETRI-Knowledge Sharing Plaform

ENGLISH

성과물

논문 검색
구분 SCI
연도 ~ 키워드

상세정보

학술대회 77~97 GHz LNA MMIC with 1 dB-Gain Flatness Using Short-Circuited Capacitor
Cited 0 time in scopus Download 0 time Share share facebook twitter linkedin kakaostory
저자
장우진, 김성일, 이종민, 이상흥, 임종원
발행일
201906
출처
International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC) 2019, pp.907-910
DOI
https://dx.doi.org/10.1109/ITC-CSCC.2019.8793428
협약과제
19DB2100, 거리해상도 개선을 위해 PLL을 적용한 1000 MHz 이상의 대역폭을 가지는 근접센서용 94 GHz 대역 SiGe 기반 Packaged Transceiver 칩 개발(이월과제), 이상흥
초록
A short-circuited capacitor in a matching circuit between the third and fourth stages of an LNA has been used to reduce an unwanted small-signal gain at 50~70 GHz and to flatten signal gain at an operating frequency of 77~97 GHz. The designed LNA shows a small-signal gain of 21.2 to 22.2 dB, a gain flatness of 1 dB, a noise figure of 5.7 to 6.9 dB, an input-reflection coefficient of -14 to -7 dB, an output-reflection coefficient of -26 to -3 dB, an isolation of -51 to -44 dB, and an 1 dB bandwidth of 20 GHz over a frequency range of 76.6~96.6 GHz. And the simulated power characteristic of the designed LNA present an 1 dB compression power, PIdB, of -3 to -1 dBm over a frequency range of 76.6~96.6 GHz.
키워드
gain flatness, LNA, MMIC, Short-circuited capacitor, SiGe
KSP 제안 키워드
6 GHz, 70 GHz, Frequency Range, Gain flatness, Noise Figure(NF), Operating frequency, Power characteristics, Reflection Coefficient, Small signal gain, matching circuit