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학술지 Developing a Multicore Platform Utilizing Open RISC-V Cores
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저자
장형욱, 한규승, 이석호, 이재진, 이승영, 이재형, 이우주
발행일
202109
출처
IEEE Access, v.9, pp.120010-120023
ISSN
2169-3536
출판사
IEEE
DOI
https://dx.doi.org/10.1109/ACCESS.2021.3108475
협약과제
21HS3700, 경량 RISC-V 기반 초저전력 인텔리전트 엣지 지능형반도체 기술 개발, 구본태
초록
RISC-V has been experiencing explosive growth since its first appearance in 2011. Dozens of free and open cores developed based on this instruction set architecture have been released, and RISC-V based devices optimized for specific applications such as the IoT and wearables, embedded systems, AI, and virtual, augmented reality are emerging. As the RISC-V cores are being used in various fields, the demand for multicore platforms composed of RISC-V cores is also rapidly increasing. Although there are various RISC-V cores developed for each specific application, and it seems possible to pick them up to create the most optimized multicore for the target application, unfortunately it is very difficult to realize this in reality. This is mainly because most open cores are released in the form of a single core without cache coherence logic, which requires expensive design effort and development costs to address it. To tackle this issue, this paper proposes a method to solve the cache coherence problem without additional effort from the developer and to maximize the performance of the multicore composed of the RISC-V core selected by the developer. Along with a description of the sophisticated operating mechanisms of the proposed method, this paper details the architecture and hardware implementation of the proposed method. Experiments conducted through the prototype development of a RISC-V multicore platform involving the proposed architecture and development of an application running on the platform demonstrate the effectiveness of the proposed method.
키워드
electronic design automation (EDA), Multicore platform, RISC-V, system-on-chip (SoC)
KSP 제안 키워드
Augmented reality(AR), Cache coherence, Development cost, Electronic Design Automation(EDA), Embedded system, Hardware Implementation, Instruction set architecture, Prototype Development, RISC-V, Specific applications, System-On-Chip(SoC)
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