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학술지 Secure Hardware Implementation of ARIA based on Adaptive Random Masking Technique
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저자
강준기, 최두호, 최용제, 한동국
발행일
201202
출처
ETRI Journal, v.34 no.1, pp.76-86
ISSN
1225-6463
출판사
한국전자통신연구원 (ETRI)
DOI
https://dx.doi.org/10.4218/etrij.12.0111.0251
협약과제
11PS1100, 부채널 공격 방지 원천 기술 및 안전성 검증 기술개발, 최두호
초록
The block cipher ARIA has been threatened by sidechannel analysis, and much research on countermeasures of this attack has also been produced. However, studies on countermeasures of ARIA are focused on software implementation, and there are no reports about hardware designs and their performance evaluation. Therefore, this article presents an advanced masking algorithm which is strong against second-order differential power analysis (SODPA) and implements a secure ARIA hardware. As there is no comparable report, the proposed masking algorithm used in our hardware module is evaluated using a comparison result of software implementations. Furthermore, we implement the proposed algorithm in three types of hardware architectures and compare them. The smallest module is 10,740 gates in size and consumes an average of 47.47 μW in power consumption. Finally, we make ASIC chips with the proposed design, and then perform security verification. As a result, the proposed module is small, energy efficient, and secure against SODPA. © 2012 ETRI.
키워드
ARIA, ASIC, Lowpower design, Masking, Side-channel analysis
KSP 제안 키워드
Differential Power Analysis, Hardware Architecture, Hardware Implementation, Hardware module, Performance evaluation, Power Consumption, Secure hardware, Side-channel analysis, block cIPher, energy-efficient, masking algorithm