상세정보
학술대회
Novel Low-Volume Solder-on-Pad (SoP) Material and Process for Flip Chip Bonding Using Au Stud Bumps
- 발행일
- 201205
- 출처
- Electronic Components and Technology Conference (ECTC) 2012, pp.1919-1924
- 협약과제
- 11MB2500, wafer level 3D IC 설계 및 집적 기술 개발, 최광성
- 초록
- A novel solder bumping material and process for low-volume solder-on-pad (SoP) have been developed to be applied in the flip chip bonding using Au stud bumps. It features a maskless, low-cost, and lead-free material. The thicknesses of the solder bumps on pads on a substrate were measured about 10 μm. With this material and optimized process, as well as, fluxing underfill, a 3D IC module composed of a GPU, two SRAM, two Si interposer with TSVs, and passives were successfully developed. © 2012 IEEE.
- KSP 제안 키워드
- 3D IC, Flip-chip bonding, Lead-free material, Low-cost, Optimized process, Si interposer, Solder bumping, low-volume