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Micromachined stress-free TSV hole for AlGaN/GaN-on-Si (1 1 1) platform-based devices
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- Authors
- Sang Choon Ko, Byoung-Gue Min, Young-Rak Park, Jung-Jin Kim, Ho Kun Sung, Jae Kyoung Mun, Eun Soo Nam
- Issue Date
- 2013-03
- Citation
- Journal of Micromechanics and Microengineering, v.23, no.3, pp.1-7
- ISSN
- 0960-1317
- Publisher
- Institute of Physics (IOP)
- Language
- English
- Type
- Journal Article
- Abstract
- This paper presents a micromachined stress-free through silicon via (TSV) backend process for AlGaN/GaN-on-Si (1 1 1) platform-based devices, which was processed by assisted back grinding, chemical mechanical polishing, deep reactive ion etching (DRIE) and copper (Cu) electroplating for the TSV. The metal-filled TSV structure was formed to enhance thermal conduction from the frontend terminal to the backend terminal, especially the source region of the AlGaN/GaN-on-Si (1 1 1) platform-based RF power devices. At the end of a stress-free TSV dry etching process, we have changed RF power 600 W to 300 W to minimize thermal stress of the fabricated TSV electrode pad structure of the AlGaN/GaN-on-Si platform-based devices. Additionally, we have sputtered a multi-metal layer and electroplated Cu metal to interconnect a topside electrode to TSV. To protect the thinned TSV electrode pad structure from water pressure in a sawing process, we have covered photoresist (AZ4330RS) of 3.3 μm thickness on the top area of the structures. We confirmed that the proposed TSV formation method assisted by low-power operation DRIE and protection of the thinned TSV surface by using the thick photoresist is very effective to create minimally stressed TSV structures in AlGaN/GaN-on-Si platform-based devices. The improvement was proved by the yield of dice without bursting the pad structures on a 4 inch AlGaN/GaN-on-Si wafer. © 2013 IOP Publishing Ltd.
- KSP Keywords
- AlGaN/GaN-on-Si, Chemical Mechanical Polishing(CMP), Deep reactive ion etching, Electroplated Cu, Etching process, Platform-based, Power device, RF Power, Reactive ion etching(RIE), Si wafer, Source region