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Journal Article CMOS Doherty Amplifier With Variable Balun Transformer and Adaptive Bias Control for Wireless LAN Application
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Authors
Namsik Ryu, Seunghyun Jang, Kwang Chun Lee, Yongchae Jeong
Issue Date
2014-06
Citation
IEEE Journal of Solid-State Circuits, v.49, no.6, pp.1356-1365
ISSN
0018-9200
Publisher
IEEE
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.1109/JSSC.2014.2313561
Project Code
13VI1600, Research on the Class-S base-station power amplifier technology for future moblie communications, Jung Jaeho
Abstract
This paper presents a novel CMOS Doherty power amplifier (PA) with an impedance inverter using a variable balun transformer (VBT) and adaptive bias control of an auxiliary amplifier. Unlike a conventional quarter-wavelength {\\lambda}/4 transmission line impedance inverter of a Doherty PA, the proposed VBT impedance inverter can achieve load modulation without any phase delay circuit. As a result, a {\\lambda} /4 phase compensation circuit at the input path of the auxiliary amplifier can be removed, and the total size of the Doherty PA can be reduced. Additionally, an enhancement of the power efficiency at backed-off power levels can successfully be achieved with an adaptive gate bias in a common gate stage of the auxiliary amplifier. The PA, fabricated with 0.13-μm CMOS technology, achieved a 1-dB compression point (P1 dB) of 31.9 dBm and a power-added efficiency (PAE) at P1 dB of 51%. When the PA is tested with 802.11g WLAN orthogonal frequency division multiplexing (OFDM) signal of 54 Mb/s, a 25-dB error vector magnitude (EVM) compliant output power of 22.8 dBm and a PAE of 30.1% are obtained, respectively. © 1966-2012 IEEE.
KSP Keywords
1-dB compression point, Adaptive bias, Bias control, CMOS Technology, Compensation circuit, Delay circuit, Doherty PA, Doherty amplifier, Doherty power amplifier(DPA), Line Impedance, Orthogonal frequency division Multiplexing(OFDM)