상세정보
학술지
A 990-uW 1.6-GHz PLL Based on a Novel Supply-Regulated Active-Loop-Filter VCO
- 발행일
- 201301
- 출처
- IEEE Transactions on Circuits and Systems II : Express Briefs, v.60 no.6, pp.311-315
- ISSN
- 1549-7747
- 출판사
- IEEE
- 협약과제
- 12PI2900, 고화질 영상 서비스 지원을 위한 컴퓨팅 내재형 미디어 융합 전달 시스템 기술개발, 이순석
- 초록
- A low-power 1.6-GHz phase-locked loop (PLL) based on a novel supply-regulated voltage-controlled oscillator (SR-VCO) including an active-loop filter (ALF) is realized. In this PLL, an active $RC$ filter is combined with SR-VCO, achieving the advantages of ALF PLL without penalties in power consumption or phase noises. The PLL has measured rms jitter of 4.82 ps, and its core consumes 990 μW from 1-V supply while the chip area is 420 × 570μm2 including on-chip passive components required for the ALF and the supply regulator. © 2004-2012 IEEE.
- KSP 제안 키워드
- Chip area, Low-Power, On-chip, Passive components, Phase locked loop(PLL), Power Consumption, Voltage controlled oscillator(VCO), active-loop filter(ALF), loop-filter(LF)