BROWSE
Detail
Conference Paper
Sub-22 nm Silicon Template Nanofabrication by Advanced Spacer Patterning Technique for NIL Applications
Cited 0 time in 
Share 
Share
- Authors
- Jong-Moon Park, Kun-Sik Park, Dong-Pyo Kim, Seong-Ook Yoo, Jin-Ho Lee
- Issue Date
- 2013-02
- Citation
- Alternative Lithographic Technologies V (SPIE 8680), pp.1-8
- Publisher
- SPIE
- Language
- English
- Type
- Conference Paper
- Abstract
- A spacer patterning technique using a poly-Si micro-feature and a SiO 2 spacer has been demonstrated to achieve sub-22 nm structures with conventional semiconductor equipments. The sub-22 nm structures have been fabricated by a plasma etching of Si substrate with a spacer oxide mask of which dimension is accurately controlled by the deposited film thickness. The profile of the Si nano-feature was influenced by an O2 flow rate during Si etching in inductively coupled plasma (ICP). As the O2 flow rate was decreased, the etch profile was improved vertically even though the etch rate of Si was slightly decreased. We obtained a 6-inch Si template with both nano- and micro-features of positive shape used for a master mold in nanoimprint lithography (NIL). The nano-sized Si features showed 22-nm width and 145-nm height with the slope of 87째. Further size reduction by anisotropic wet etching with KOH solution was also investigated. © 2013 SPIE.
- KSP Keywords
- 22 nm, Anisotropic wet etching, Etch rates, Film thickness, Flow rate, KOH solution, Master mold, Micro-features, Nano-sized, Nanoimprint lithography(NIL), Patterning technique