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Conference Paper
고속 비동기 디지털 신호레벨 변환기를 포함한 12bit 330MS/s 디지털-아날로그 신호변환기
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- Issue Date
- 2014-06
- Citation
- 대한전자공학회 종합 학술 대회 (하계) 2014, pp.294-297
- Publisher
- 대한전자공학회
- Language
- English
- Type
- Conference Paper
- Abstract
- In this paper, a high-speed CMOS DAC for video application is described. In order to achieve a 12bit resolution and a 330MS/s high-conversion rate under a 1.0V digital core voltage and 3.3V analog I/O voltage condition, both a proposed high-speed asynchronous digital signal level converter and an improved impedance current cell are adopted. The full-scale output voltage is 1.3V at 37.5Ω load. The measured results show that the DNL and INL are ±0.6LSB and ±1.4LSB, respectively. The SFDR is more than 62dB up to a 10MHz output signal frequency for all sampling rates (up to 330MS/s). The DAC is fabricated in a standard 45nm CMOS technology with an active area of 0.11mm²
- KSP Keywords
- 45nm CMOS, Active area, CMOS Technology, Digital Signal, Full-scale, High Speed, High conversion, Level converter, Output Voltage, Sampling rate, Signal level