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A Low-Complexity 128-Point Mixed-Radix FFT Processor for MB-OFDM UWB Systems
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- Authors
- Sang-In Cho, Kyu-Min Kang
- Issue Date
- 2010-02
- Citation
- ETRI Journal, v.32, no.1, pp.1-10
- ISSN
- 1225-6463
- Publisher
- 한국전자통신연구원 (ETRI)
- Language
- English
- Type
- Journal Article
- Project Code
- 09MR6500, A Study on the radio requirements of coexistence for dynamic spectrum access, Hong Heon Jin
- Abstract
- In this paper, we present a fast Fourier transform (FFT) processor with four parallel data paths for multiband orthogonal frequency-division multiplexing ultrawideband systems. The proposed 128-point FFT processor employs both a modified radix-24 algorithm and a radix-23 algorithm to significantly reduce the numbers of complex constant multipliers and complex booth multipliers. It also employs substructure-sharing multiplication units instead of constant multipliers to efficiently conduct multiplication operations with only addition and shift operations. The proposed FFT processor is implemented and tested using 0.18 μm CMOS technology with a supply voltage of 1.8 V. The hardware- efficient 128-point FFT processor with four data streams can support a data processing rate of up to 1 Gsample/s while consuming 112 mW. The implementation results show that the proposed 128-point mixed-radix FFT architecture significantly reduces the hardware cost and power consumption in comparison to existing 128-point FFT architectures. © 2010 ETRI.
- KSP Keywords
- Booth multipliers, CMOS Technology, Data processing, Data stream, FFT processor, Fast fourier transform (fft), MB-OFDM UWB, Mixed-radix, Orthogonal frequency division Multiplexing(OFDM), Parallel data, Power Consumption