비동기식 회로는 발생 전류가 분산되어 피크 전류가 감소되어 상대적으로 낮은 전자기파를 방출하며, 저전압 환경에서도 올바른 동작을 수행하는 장점을 갖고 있다. 본 논문에서는 이러한 특성을 실측하기 위해, MIPS에 기반을 둔 동일한 명령어 셋을 갖는 비동기식, 동기식 프로세서를 설계하여 FPGA에서 구현한 후, EMI 방출 및 저전압에서의 동작을 실험하였다. 실험 결과, 클록 주파수인 50MHz의 하모닉 주파수 대역에서 방출 피크가 관찰되었으며, 최대 방출 피크치는 동기식 (67.25dBμV)에 비해 비동기식 (62.08dBμV)이 더 낮았다. 특히 600MHz 이상의 고주파 대역에서 비동기식의 방출 피크치가 현저히 감소하였다. 또한, FPGA의 동작 전압인 5V보다 낮은 3.2V 이하에서 동기식 MIPS의 급격한 성능 감소를 보였고, 반면 비동기식 MIPS는 2.6V까지 원래 성능의 50%를 유지하였다.
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