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Journal Article
A Memory-Efficient Pattern Matching with Hardware-Based Bit-Split String Matchers for Deep Packet Inspection
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- Authors
- HyunJin KIM, Hong-Sik KIM, Jung-Hee LEE, Jin-Ho AHN, Sungho KANG
- Issue Date
- 2010-02
- Citation
- IEICE Transactions on Communications, v.E93.B, no.2, pp.396-398
- ISSN
- 0916-8516
- Publisher
- 일본, 전자정보통신학회 (IEICE)
- Language
- English
- Type
- Journal Article
- Abstract
- This paper proposes a hardware-based parallel pattern matching engine using a memory-based bit-split string matcher architecture. The proposed bit-split string matcher separates the transition table from the state table, so that state transitions towards the initial state are not stored. Therefore total memory requirements can be minimized. © 2010 The Institute of Electronics.
- KSP Keywords
- Bit-split, Memory-based, Parallel pattern matching, Pattern matching engine, State Transition, Transition Table, deep packet inspection(DPI), initial state, memory requirements, memory-efficient