상세정보
학술대회
A CMOS Single-Chip Transceiver Design for 700/800/900MHz Wireless Sensor Network Applications
- 발행일
- 201410
- 출처
- International Conference on Information and Communication Technology Convergence (ICTC) 2014, pp.699-700
- 초록
- This paper presents a low-power CMOS single-chip transceiver for sub-GHz wireless sensor network applications, which complies IEEE 802.15.4-2012 standard. It embodies RF transceiver section based on direct-conversion transmitter and low-IF receiver architecture. To validate its operation, the prototype is fabricated in 0.18um GF standard CMOS process. It shows +5dBm TX output power and -85dBm RX sensitivity. Furthermore, RX dynamic range reaches up to 90dB. The transceiver consumes 26mA and 18mA for TX and RX operations under 1.8V supply voltage, respectively. It occupies 10mm2 active area for the RF transceiver section.
- KSP 제안 키워드
- Active area, Direct Conversion, IEEE 802.15.4, Low-IF receiver, Output power, RF transceiver, Receiver architecture, Standard CMOS process, Static wireless sensor networks(WSNs), Sub-GHz, Supply voltage