상세정보
학술대회
Automating Interconnect Organization for Minimizing Dynamic Power in SoC
- 발행일
- 201403
- 출처
- International Conference on Computational Science and Computational Intelligence (CSCI) 2014, pp.307-308
- 협약과제
- 13VS3100, Full HD급 클라우드 서비스를 위한 그래픽 가속처리 및 전송 프로토콜 기술 개발, 박찬호
- 초록
- In modern circuits, the impact of interconnect circuitry on dynamic power consumption grows enormous. The functional unit duplication (FUD) with isolation can eliminate interconnect overhead. However, the FUD usually causes massive increase of area and isolation cost. Thus, designers should carefully apply the FUD to achieve the least dynamic power consumption considering a cost budget. We propose an algorithm to automate the process for deriving the optimal organization of FUs. © 2014 IEEE.
- KSP 제안 키워드
- Cost budget, Dynamic power consumption, Functional unit