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Conference Paper Development of Low Contact Resistance Interconnection for Display Applications
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Authors
Haksun Lee, Yong-Sung Eom, Hyun-Cheol Bae, Kwang-Seong Choi, Jin Ho Lee
Issue Date
2014-09
Citation
Electronic System-Integration Technology Conference (ESTC) 2014, pp.1-5
Publisher
IEEE
Language
English
Type
Conference Paper
DOI
https://dx.doi.org/10.1109/ESTC.2014.6962817
Abstract
This paper focuses on development of a low contact resistance interconnection for low temperature bonding applications. Alternative to conventional display interconnection mechanisms using anisotropic conductive film (ACF), solder and underfill method using low melting point Bi58-Sn solder is suggested. Solder bumping is carried out using a maskless Solder-on-Pad technology. An average bump height of 16.4μm with 80μm bump pitch is achieved by optimizing the solder paste material called Solder-Bump-Maker. The test vehicle with bumps is flip chip bonded with a top die using Fluxing underfill. In order to analyze the quality of the bonded interconnection, contact resistance was measured using the 4-point probe method, and a moisture absorption test was conducted in a 85°C/85% relative humidity condition for 100 hours. The contact resistance values before and after the reliability test show no significant difference, which demonstrates that the suggested interconnection is a robust joint with increased electrical performance.
KSP Keywords
4-Point probe, Anisotropic Conductive Films(ACFs), Bump pitch, Contact resistance(73.40.Cg), Display applications, Electrical performance, Flip-chip(FC), Low contact resistance, Probe method, Relative Humidity(RH), Reliability test