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Conference Paper
Evaluation of Cache Partitioning: Improving CPU Utilization of Multi-core Embedded Processors
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- Authors
- Eunji Pak
- Issue Date
- 2014-05
- Citation
- International Symposium on Embedded Technology (ISET) 2014, pp.1-2
- Language
- English
- Type
- Conference Paper
- Abstract
- In multi-core embedded processors, concurrently running tasks compete for the shared cache and cause interthread cache interference. That interference increases the WCET of real-time tasks, allocates excessive time and resources to tasks, and negatively affects the system resource utilization. In this paper, we exploit the cache partitioning capability of modern server processors and show the potential of cache partitioning technique to alleviate the cache interference problem in modern embedded multi-core processors.
- KSP Keywords
- CPU Utilization, Embedded processor, Real-time tasks, Resource utilization, Shared Cache, cache partitioning, interference problem, multi-core processor