상세정보
학술대회
Hardware Architecture for Real-Time Face Detection on Embedded Analog Video Cameras
- 발행일
- 201412
- 출처
- International Conference on Computer Science and its Applications (CSA) 2014 (LNEE 330), v.330, pp.311-316
- 초록
- This paper proposes novel hardware architecture for realtime face detection, which is efficient and suitable for embedded system. The proposed architecture is based on AdaBoost learning algorithm with Haar-like features and it aims to apply to a low-cost FPGA that can be applied to legacy analog cameras as a target platform. We propose the using of cumulative line sum to calculate integral image and an alternative method to avoid costly division for the computing of a standard deviation. The experimental results show that the processing time for a 320×240 pixel image is 42 frames per second with the 100MHz, which is about 3 times faster than previous works.
- KSP 제안 키워드
- AdaBoost learning algorithm, Alternative method, Embedded system, Frames per second(FPS), Haar-Like features, Hardware Architecture, Integral Image, Low-cost, Real-Time Face Detection, Standard deviation(STD), Video camera