상세정보
학술지
High-Performance Polycrystalline Silicon TFT on the Structure of a Dopant-Segregated Schottky-Barrier Source/Drain
- 발행일
- 201003
- 출처
- IEEE Electron Device Letters, v.31 no.3, pp.228-230
- ISSN
- 0741-3106
- 출판사
- IEEE
- 협약과제
- 10ZE1100, ETRI 연구역량 강화를 위한 R&D체계 구축 및 Seed형 기술개발을 위한 창의형 연구 사업, 현창희
- 초록
- A high-performance polycrystalline silicon (poly-Si) thin-film transistor (TFT) with Schottky-barrier (SB) source/drain (S/D) junctions is proposed. A p-channel operation on the intrinsic nickel (Ni) silicided S/D was successfully realized with the aid of a thin active layer, despite the fact that the Ni silicided material shows a high SB height (SBH) for holes. Furthermore, for n-channel operation, the dopant-segregation technique implemented on the intrinsic Ni silicide was utilized to reduce the effective SBH for electrons. The results show a higher on-current due to the lower parasitic resistance as well as superior immunity against short-channel effects, compared to the conventional poly-Si TFT composed of p-n S/D junctions. © 2006 IEEE.
- KSP 제안 키워드
- Active Layer, High performance, Ni silicide, P-Channel, Petri net(PN), Poly-Si TFT, Polycrystalline silicon(poly-Si), Schottky barrier, Thin-Film Transistor(TFT), dopant-segregation, n-channel operation